Compiler Engineer

Pittsburgh, PA or San Francisco Bay Area


We are seeking a Compiler Engineer to join our growing team. The Compiler Engineer will contribute to the design and implementation of an embedded machine learning (ML) system stack and TinyML applications to run on the world’s most energy-efficient programmable processor. This position is a unique opportunity to develop applications for cutting-edge hardware as part of a highly interdisciplinary team, helping to demonstrate the value of Efficient’s breakthrough technology.

If you are an engineer who wants to be part of an intensely skilled team and wants to have an immediate impact building the next generation of energy-efficient ML applications, we want to talk with you!

Key responsibilities

  • Develop new compiler features to improve overall hardware efficiency while maintaining programmability. These may relate to:
    • Efficient’s new dataflow ISA
    • Memory analysis and ordering
    • Hardware constraints such as timing and power consumption
    • Place-and-route of applications onto Efficient’s fabric
    • Visualization
    • Programmer debugging tools
  • Write unit and integration tests to uncover functional- and performance-related compiler bugs.
  • Work with various machine-learning frameworks to compile models to our custom hardware.
  • Debug and fix functional and performance issues of the compiler system.
  • Collaborate with the hardware and physical design team to understand and improve hardware architecture and propose future improvements.
  • Work closely with the application development team to understand the problem domain and deliver optimized compiler solutions.

Required qualifications & experience requirements

  • 2+ years of experience with C++.
  • Bachelor's/Master's degree in CS or related field.
  • Familiarity with compiler frameworks such as GCC, LLVM, and/or MLIR.
  • Understanding of computer architecture and optimization.
  • Experience using industry standard development and debugging tools including GDB.
  • Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills.
  • Good problem solving skills.

Additional qualifications considered

  • Familiarity with FPGA-compilation and/or PnR algorithms.
  • Experience with verilog, system verilog, or VHDL.
  • Knowledge of computer architecture.

Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more!  We are committed to personal and professional development and strive to grow together as people and as a company.

Ready to apply?

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About us

Efficient was established in 2022 as a spinout of Carnegie Mellon University and is currently building a world-class team of hardware and software engineers spanning from silicon implementation to compilers. With seed funding secured, a portfolio of patent-protected IP, and substantial progress on hardware and software development, Efficient is moving quickly toward delivering first silicon in early- to mid-2024.

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Working at Efficient

We are a small, but mighty team, with team members spread across EffHQ in Pittsburgh, Silicon Valley, and New York City. We are a young company on a tremendous growth path. We aim to bring our team together, in-person often and camaraderie is key to our success. We also have the tools and technology to keep us together and interactive as a remote team.

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