Senior Digital Design Engineer

Pittsburgh, PA or San Francisco Bay Area

EngineeringDigital Design

Efficient is seeking a Senior Digital Design Engineer to join our growing team. The Senior Digital Design Engineer will contribute to the design, implementation, and verification of the world’s most energy-efficient, general-purpose processor. This position is a unique opportunity to realize our product, work as a digital hardware designer with a highly interdisciplinary team, and help shape the future of Efficient’s technology.

Key Responsibilities

  • Design, implement, and verify features from specification through synthesis
  • Implement product features at the RTL-level targeting silicon implementation
  • Implement product features at the RTL-level targeting FPGA emulation for verification
  • Build unit testbench infrastructure to verify implemented features
  • Design of memory systems and digital integration of memory macros, including SRAM, MRAM, and others
  • Interface design components with external/vendor-provided IP
  • Use industrial-strength digital design tools from RTL simulation through synthesis, which may include Cadence, Synopsys, Mentor/Siemens EDA, and ANSYS as necessary
  • Provide comprehensive feature and integration documentation
  • Interact with physical design and digital verification team for pre-silicon verification
  • Work with physical design team to resolve RTL-level issues leading to DRC violations
  • Work with compiler and embedded software teams to develop, document, and implement features that span across the software-hardware boundary, including Efficient’s dataflow ISA

Required qualifications & experience

  • 7+ years of digital design experience with substantial experience designing for tape-out
  • Experience running a digital design flow using industry-strength digital design and EDA tools
  • Experience with designing and implementing features in RTL
  • Experience integrating digital IP with RTL-level implementations
  • Experience with pre-silicon verification
  • Experience with continuous integration and testing of digital designs
  • Experience with version control and scripting languages (Python preferred)
  • Experience with memory compiler toolchains
  • Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills
  • Good problem solving skills

Desired qualifications & experience

  • Experience designing compilers
  • Knowledge of computer architecture
  • Knowledge of physical design and ASIC implementation
  • Experience with power and energy modeling (using tools like PowerArtist, Joules, etc.)
  • Bachelor’s degree in related field required. Master’s or PhD. preferred.

Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, flexibility, and more!  We are committed to personal and professional development and strive to grow together as people and as a company.

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About us

Efficient was established in 2022 as a spinout of Carnegie Mellon University and is currently building a world-class team of hardware and software engineers spanning from silicon implementation to compilers. With seed funding secured, a portfolio of patent-protected IP, and substantial progress on hardware and software development, Efficient is moving quickly toward delivering first silicon in early- to mid-2024.

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Working at Efficient

We are a small, but mighty team, with team members spread across EffHQ in Pittsburgh, Silicon Valley, and New York City. We are a young company on a tremendous growth path. We aim to bring our team together, in-person often and camaraderie is key to our success. We also have the tools and technology to keep us together and interactive as a remote team.

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